Revert rG42230efccf8fe1185be5fa6c23dce0a8183d6ec9 "[DAG] Fold (sra (or (shl x, c1...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Oct 2022 11:07:29 +0000 (12:07 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Oct 2022 11:07:41 +0000 (12:07 +0100)
commit9708d88017d0c9adaea65a4f5a5b589b67f292e2
tree3c4621857b38bc9ca8d55aaa1d8996d99738b50a
parent66bd6074c133402e45075b591c062c22f308ef26
Revert rG42230efccf8fe1185be5fa6c23dce0a8183d6ec9 "[DAG] Fold (sra (or (shl x, c1), (shl y, c2)), c1) -> (sext_inreg (or x, (shl y,c2-c1)) iff c2 >= c1"

@foad was right - this isn't actually going to help with D136042 as much as hoped, we need a better AMDGPU-specific solution as other targets are likely to make use of it
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AMDGPU/bfe-patterns.ll