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author	Sebastian Neubauer <sebastian.neubauer@amd.com>
	Mon, 7 Jun 2021 14:09:48 +0000 (16:09 +0200)
committer	Sebastian Neubauer <sebastian.neubauer@amd.com>
	Mon, 7 Jun 2021 14:09:48 +0000 (16:09 +0200)
commit	96e1fcb1e005646c3aedc5a723c108e9387ff9e0
tree	a42d396ef4331bdb7077f6d866784be2975431b7	tree \| snapshot
parent	7e176ff2db93304620a9080df2e003ae50f9b826	commit \| diff

[AMDGPU] Use s_add_i32 for address additions

This allows to convert the add instruction to s_addk_i32 and
v_add_nc_u32 instead of needing v_add_co_u32 when converting to a VALU
instruction.

Differential Revision: https://reviews.llvm.org/D103322

43 files changed:

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/addrspacecast.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-constant.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cc-update.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/flat-scratch.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/indirect-call.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/need-fp-from-csr-vgpr-spill.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/nested-calls.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sibling-call.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/stack-realign.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/wave32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll		diff \| blob \| history

Domain: System / Toolchain;

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