ARM: zynq: DT: Enable all FCLKs by default
authorChristian Kohn <christian.kohn@xilinx.com>
Wed, 12 Oct 2022 09:30:33 +0000 (11:30 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 22 Nov 2022 14:02:07 +0000 (15:02 +0100)
commit96dcde487e7ece6de437a55175f9a5ec5c4ecd59
tree761062fc0584f24ea8c73b69fa02cfe584af56d6
parentb34bc22bd9921547246c117fb95eb58bedaceff5
ARM: zynq: DT: Enable all FCLKs by default

The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.

Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com
arch/arm/dts/zynq-7000.dtsi