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(parent: cf3a262) | patch
drm/amd/display: fix seamless boot stream adding algorithm
authorRaymond Yang <rayyang@amd.com>
Thu, 17 Dec 2020 01:24:30 +0000 (09:24 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 14 Jan 2021 04:44:06 +0000 (23:44 -0500)
commit96b5e3e1f8b5d1e193e3ffc2250178f143f4d9c8
tree29d68bb80a8d170e110d323ef79501dcabd98935tree | snapshot
parentcf3a2627597794797ce5930537c0e75df284b6e9commit | diff
drm/amd/display: fix seamless boot stream adding algorithm

[Why]
Seamless boot stream has hw resource assigned, already.  'add' is
actually rebuild the assignment.

[How]
Swap seamless boot stream to pipe 0 (if needed) to ensure pipe_ctx
matches

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Raymond Yang <rayyang@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_resource.c diff | blob | history
Domain: System / Kernel;