[RISCV] Support Constant Pools in Load/Store Peephole
authorSam Elliott <selliott@lowrisc.org>
Mon, 11 May 2020 17:52:42 +0000 (18:52 +0100)
committerSam Elliott <selliott@lowrisc.org>
Mon, 11 May 2020 18:20:38 +0000 (19:20 +0100)
commit969e703427516cc9474920c4cf274fa5e7958462
tree147304f78af9f1980ac6e360077880cf137b0ef6
parent10658691951f7e3ffd257f24e29e81a101daa204
[RISCV] Support Constant Pools in Load/Store Peephole

Summary:
RISC-V uses a post-select peephole pass to optimise
`(load/store (ADDI $reg, %lo(addr)), 0)` into `(load/store $reg, %lo(addr))`.
This peephole wasn't firing for accesses to constant pools, which is how we
materialise most floating point constants.

This adds support for the constantpool case, which improves code generation for
lots of small FP loading examples. I have not added any tests because this
structure is well-covered by the `fp-imm.ll` testcases, as well as almost
all other uses of floating point constants in the RISC-V backend tests.

Reviewed By: luismarques, asb

Differential Revision: https://reviews.llvm.org/D79523
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
llvm/test/CodeGen/RISCV/codemodel-lowering.ll
llvm/test/CodeGen/RISCV/double-imm.ll
llvm/test/CodeGen/RISCV/double-previous-failure.ll
llvm/test/CodeGen/RISCV/float-imm.ll
llvm/test/CodeGen/RISCV/fp-imm.ll
llvm/test/CodeGen/RISCV/select-const.ll