author | ShihPo Hung <shihpo.hung@sifive.com> | |
Thu, 21 Jan 2021 02:45:33 +0000 (18:45 -0800) | ||
committer | ShihPo Hung <shihpo.hung@sifive.com> | |
Fri, 22 Jan 2021 02:38:49 +0000 (18:38 -0800) | ||
commit | 96677503315e689fd3c8f5ef164d8fb9725d4bb3 | |
tree | f4648d9f3d7f5bad41e9a0becc02316ba866ce60 | tree | snapshot |
parent | 976cf53cc7a5dd03932a6e44b8a9350a05cdaa68 | commit | diff |
llvm/include/llvm/IR/IntrinsicsRISCV.td | diff | blob | history | |
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | diff | blob | history | |
llvm/test/CodeGen/RISCV/vfrece7-rv32.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/RISCV/vfrece7-rv64.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/RISCV/vfrsqrte7-rv32.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/RISCV/vfrsqrte7-rv64.ll | [new file with mode: 0644] | blob |