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(parent: 1c046bc) | patch
drm/i915/gen9: fix PIPE_CONTROL flush for VS_INVALIDATE
authorImre Deak <imre.deak@intel.com>
Sun, 25 Jan 2015 21:27:11 +0000 (13:27 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 14 Apr 2015 11:55:20 +0000 (13:55 +0200)
commit9647ff36ae266b74c82780f7f4e3bb4a39506107
tree3c695b9e00338d375d1f581af224ea518dfa5819tree | snapshot
parent1c046bc1db49e5a42e5c4167ac42cee4c1725a37commit | diff
drm/i915/gen9: fix PIPE_CONTROL flush for VS_INVALIDATE

On GEN9+ per specification a NULL PIPE_CONTROL needs to be emitted
before any PIPE_CONTROL command with the VS_INVALIDATE flag set.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_lrc.c diff | blob | history
Domain: System / Kernel;