aarch64: Use RTL builtins for [su]mlsl_high_lane[q] intrinsics

aarch64: Use RTL builtins for [su]mlsl_high_lane[q] intrinsics

Rewrite [su]mlsl_high_lane[q] Neon intrinsics to use RTL builtins
rather than inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-02  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mlsl_hi_lane[q] builtin macro generators.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mlsl_hi_lane<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_lane<mode>): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmlsl_high_lane_s32): Likewise.
	(vmlsl_high_lane_u16): Likewise.
	(vmlsl_high_lane_u32): Likewise.
	(vmlsl_high_laneq_s16): Likewise.
	(vmlsl_high_laneq_s32): Likewise.
	(vmlsl_high_laneq_u16): Likewise.
	(vmlsl_high_laneq_u32): Likewise.
	(vmlal_high_laneq_u32): Likewise.