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ARM: debug: enable UART1 for socfpga Cyclone5
authorClément Péron <peron.clem@gmail.com>
Tue, 9 Oct 2018 11:28:37 +0000 (13:28 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 21 Dec 2019 09:41:13 +0000 (10:41 +0100)
commit96120db99f56528a4a7ab32ba13c77d1e4d86aef
treeb7bab01cb592cd369ac8778caa473a48882d5c38tree | snapshot
parent4aec7a73e2d2c376e53c9314598243b5c49300a7commit | diff
ARM: debug: enable UART1 for socfpga Cyclone5

[ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ]

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/Kconfig.debug diff | blob | history
Domain: System / Kernel;