projects / platform / kernel / linux-starfive.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8bef7d8) | patch
riscv:dts:jh7110: Modify CMA reserved space to better support 2G DRAM
authorsamin <samin.guo@starfivetech.com>
Mon, 26 Sep 2022 04:33:27 +0000 (12:33 +0800)
committersamin <samin.guo@starfivetech.com>
Mon, 26 Sep 2022 04:39:10 +0000 (12:39 +0800)
commit960975c9eb6dbc21ebf79dd1de82b059dce480a9
treec269725dcb78122f63b34ecf436a24dd1b2a0ea8tree | snapshot
parent8bef7d8fd8b121b3125eb1206bc1b2ebfc649801commit | diff
riscv:dts:jh7110: Modify CMA reserved space to better support 2G DRAM

When the DDR is 2G (0x40000000-0xc0000000), it may cause address usage
problems.

Signed-off-by: samin <samin.guo@starfivetech.com>
arch/riscv/boot/dts/starfive/jh7110-common.dtsi diff | blob | history
Domain: System / Kernel;