clk: ast2600: Keep PLL power on
authorDylan Hung <dylan_hung@aspeedtech.com>
Tue, 21 Feb 2023 13:01:10 +0000 (21:01 +0800)
committerTom Rini <trini@konsulko.com>
Mon, 6 Mar 2023 22:03:56 +0000 (17:03 -0500)
commit95f79553849cfb936f8c1e8d453b5a8b73db462c
tree949aab1c9db1d4865ac322704161b6602b43c03c
parent45443f6089e1e194bdd8f2aa351c72e32eb1d815
clk: ast2600: Keep PLL power on

According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
drivers/clk/aspeed/clk_ast2600.c