e1000e: fix logical error in flush_desc_rings
authorYanir Lubetkin <yanirx.lubetkin@intel.com>
Wed, 22 Apr 2015 16:25:17 +0000 (19:25 +0300)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 3 Jun 2015 10:29:52 +0000 (03:29 -0700)
commit95f0d950467f1228d4e326c11150e1750a6dd1ef
tree5349f55d20124867304a2200a48b4c83444f068e
parentbfc9473bf90457bf31d3f675d82234897c6480cd
e1000e: fix logical error in flush_desc_rings

The condition under which the flush should occur was reversed.  The fix
should be applied before any HW reset (unless followed by bus reset)
and before any power state transition from D0.

If E1000_FEXTNVM7_NEED_DESCRING_FLUSH bit is set in FEXTNVM7 and TDLEN > 0
the Tx ring should be flushed. (fixes ~95% of the hang states).
If the E1000_FEXTNVM7_NEED_DESCRING_FLUSH did not clear, we should also
flush the RX ring. Bug was caught by Alexander Duyck during a code review
when examining this fix.

Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000e/netdev.c