R600/SI: Allow commuting some 3 op instructions
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 13 Nov 2014 19:26:47 +0000 (19:26 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 13 Nov 2014 19:26:47 +0000 (19:26 +0000)
commit95e48668b6081bcbc632970d531c75733ae47647
tree7652fd2b8fe04c5aadbaf202d11625be88f578ae
parent853b881b8b43abbfffeecfe357a30170239f638c
R600/SI: Allow commuting some 3 op instructions

e.g. v_mad_f32 a, b, c -> v_mad_f32 b, a, c

This simplifies matching v_madmk_f32.

This looks somewhat surprising, but it appears to be
OK to do this. We can commute src0 and src1 in all
of these instructions, and that's all that appears
to matter.

llvm-svn: 221910
llvm/lib/Target/R600/SIInstructions.td
llvm/test/CodeGen/R600/commute_modifiers.ll
llvm/test/CodeGen/R600/fma.ll
llvm/test/CodeGen/R600/fmuladd.ll
llvm/test/CodeGen/R600/llvm.AMDGPU.umad24.ll
llvm/test/CodeGen/R600/use-sgpr-multiple-times.ll