drm/i915/icl: No need to ack intr through master control
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Mon, 15 Oct 2018 14:14:39 +0000 (17:14 +0300)
committerMika Kuoppala <mika.kuoppala@linux.intel.com>
Tue, 16 Oct 2018 10:11:23 +0000 (13:11 +0300)
commit95b0e7c14c500ac7522924a54e6beddf69d383ec
treefe9ddf22c39f32022b4baa3a4d3f6314753af158
parent4376b9c965c0563b1f95e8b7fae560e8e4890c00
drm/i915/icl: No need to ack intr through master control

All other master control register bits, except the enable,
are read only and they are level indications of the second
level interrupt status. Only touch enable bit and rectify
the comment.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181015141440.21845-2-mika.kuoppala@linux.intel.com
drivers/gpu/drm/i915/i915_irq.c