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(parent: a2bbfc5) | patch
armv8/ls1088a: configure PMU's PCTBENR to enable WDT
authorZhang Ying-22455 <ying.zhang22455@nxp.com>
Tue, 9 Jan 2018 08:25:46 +0000 (16:25 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 15 Jan 2018 20:44:23 +0000 (12:44 -0800)
commit958b2ed5267a814ade0755610755fe25ffcb20cf
tree371cfbee26d88d2b5826d2e2aeb7a3673d561cc4tree | snapshot
parenta2bbfc54805a1278cc3901e17923220c74fb8e83commit | diff
armv8/ls1088a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/cpu.c diff | blob | history
Domain: System / Kernel;