author | Xiang1 Zhang <xiang1.zhang@intel.com> | |
Thu, 24 Mar 2022 01:24:15 +0000 (09:24 +0800) | ||
committer | Xiang1 Zhang <xiang1.zhang@intel.com> | |
Thu, 24 Mar 2022 01:41:23 +0000 (09:41 +0800) | ||
commit | 95664050201dbe595d5749bf0212f3847e1d9403 | |
tree | 0975170f14b8fba5b746f2eb1a0b3b897ee40494 | tree | snapshot |
parent | 287dad13abba934db5f4a62a968263eea2693b4f | commit | diff |
llvm/docs/LangRef.rst | diff | blob | history | |
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | diff | blob | history | |
llvm/lib/Target/X86/X86AsmPrinter.cpp | diff | blob | history | |
llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-1-reg.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-2-regs.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-nopic.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-1-reg.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-2-regs.ll | [new file with mode: 0644] | blob |