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author	Sanjay Patel <spatel@rotateright.com>
	Tue, 19 Jul 2022 21:36:27 +0000 (17:36 -0400)
committer	Sanjay Patel <spatel@rotateright.com>
	Tue, 19 Jul 2022 21:37:22 +0000 (17:37 -0400)
commit	95401b015393b350f826d097cc5b45b6a604dfa5
tree	8f9eb9c967c8647bd9ab79faefeb05eab4efdb79	tree \| snapshot
parent	bf789b1957efd2482e1dbd164d91a6612a450fe3	commit \| diff

Revert "[x86] use zero-extending load of a byte outside of loops too"

This reverts commit 9d1ea1774c51c44ddf0b5065bf600919988d7015.
There are tests of update_llc_tests_checks.py that missed being updated.

209 files changed:

llvm/lib/Target/X86/X86FixupBWInsts.cpp		diff \| blob \| history
llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll		diff \| blob \| history
llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll		diff \| blob \| history
llvm/test/CodeGen/X86/GlobalISel/callingconv.ll		diff \| blob \| history
llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll		diff \| blob \| history
llvm/test/CodeGen/X86/PR40322.ll		diff \| blob \| history
llvm/test/CodeGen/X86/abs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/add-sub-bool.ll		diff \| blob \| history
llvm/test/CodeGen/X86/and-load-fold.ll		diff \| blob \| history
llvm/test/CodeGen/X86/and-sink.ll		diff \| blob \| history
llvm/test/CodeGen/X86/and-with-overflow.ll		diff \| blob \| history
llvm/test/CodeGen/X86/arg-copy-elide.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atom-cmpb.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-idempotent.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-mi.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-monotonic.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-unordered.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avoid-sfb.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-calling-conv.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-ext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-insert-extract.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-load-store.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-mask-op.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-select.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bitcast-vector-bool.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bitreverse.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bmi.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bool-math.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bool-vector.ll		diff \| blob \| history
llvm/test/CodeGen/X86/brcond.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bt.ll		diff \| blob \| history
llvm/test/CodeGen/X86/btc_bts_btr.ll		diff \| blob \| history
llvm/test/CodeGen/X86/byval5.ll		diff \| blob \| history
llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll		diff \| blob \| history
llvm/test/CodeGen/X86/clear-highbits.ll		diff \| blob \| history
llvm/test/CodeGen/X86/clear-lowbits.ll		diff \| blob \| history
llvm/test/CodeGen/X86/clz.ll		diff \| blob \| history
llvm/test/CodeGen/X86/cmov.ll		diff \| blob \| history
llvm/test/CodeGen/X86/cmovcmov.ll		diff \| blob \| history
llvm/test/CodeGen/X86/combine-andintoload.ll		diff \| blob \| history
llvm/test/CodeGen/X86/combine-bswap.ll		diff \| blob \| history
llvm/test/CodeGen/X86/const-shift-of-constmasked.ll		diff \| blob \| history
llvm/test/CodeGen/X86/copy-eflags.ll		diff \| blob \| history
llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll		diff \| blob \| history
llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll		diff \| blob \| history
llvm/test/CodeGen/X86/divide-by-constant.ll		diff \| blob \| history
llvm/test/CodeGen/X86/divrem8_ext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/emutls.ll		diff \| blob \| history
llvm/test/CodeGen/X86/extract-bits.ll		diff \| blob \| history
llvm/test/CodeGen/X86/extract-insert.ll		diff \| blob \| history
llvm/test/CodeGen/X86/extract-lowbits.ll		diff \| blob \| history
llvm/test/CodeGen/X86/extractelement-index.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-call-bool.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-i1.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-sext-zext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fixup-bw-copy.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fixup-bw-inst.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fold-and-shift.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fp-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fp80-strict-scalar.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fptosi-sat-scalar.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fptoui-sat-scalar.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fshl.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fshr.ll		diff \| blob \| history
llvm/test/CodeGen/X86/funnel-shift-rot.ll		diff \| blob \| history
llvm/test/CodeGen/X86/funnel-shift.ll		diff \| blob \| history
llvm/test/CodeGen/X86/gpr-to-mask.ll		diff \| blob \| history
llvm/test/CodeGen/X86/h-register-addressing-32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/h-register-addressing-64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll		diff \| blob \| history
llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll		diff \| blob \| history
llvm/test/CodeGen/X86/iabs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/inc-of-add.ll		diff \| blob \| history
llvm/test/CodeGen/X86/insertelement-var-index.ll		diff \| blob \| history
llvm/test/CodeGen/X86/isel-sink2.ll		diff \| blob \| history
llvm/test/CodeGen/X86/legalize-shift-64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/lifetime-alias.ll		diff \| blob \| history
llvm/test/CodeGen/X86/load-local-v3i1.ll		diff \| blob \| history
llvm/test/CodeGen/X86/load-local-v4i5.ll		diff \| blob \| history
llvm/test/CodeGen/X86/load-scalar-as-vector.ll		diff \| blob \| history
llvm/test/CodeGen/X86/masked_gather_scatter.ll		diff \| blob \| history
llvm/test/CodeGen/X86/memcmp-more-load-pairs-x32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/memcmp-x32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/memcmp.ll		diff \| blob \| history
llvm/test/CodeGen/X86/memcpy.ll		diff \| blob \| history
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll		diff \| blob \| history
llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll		diff \| blob \| history
llvm/test/CodeGen/X86/midpoint-int.ll		diff \| blob \| history
llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll		diff \| blob \| history
llvm/test/CodeGen/X86/movmsk-cmp.ll		diff \| blob \| history
llvm/test/CodeGen/X86/musttail-varargs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/neg-abs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/negate-i1.ll		diff \| blob \| history
llvm/test/CodeGen/X86/oddshuffles.ll		diff \| blob \| history
llvm/test/CodeGen/X86/or-with-overflow.ll		diff \| blob \| history
llvm/test/CodeGen/X86/packed_struct.ll		diff \| blob \| history
llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll		diff \| blob \| history
llvm/test/CodeGen/X86/popcnt.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr12360.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr15267.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr20011.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr22473.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr28824.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr32345.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr34292.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr34381.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr35765.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr38539.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr38743.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr38795.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr39926.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr46527.ll		diff \| blob \| history
llvm/test/CodeGen/X86/pr5145.ll		diff \| blob \| history
llvm/test/CodeGen/X86/reduce-trunc-shl.ll		diff \| blob \| history
llvm/test/CodeGen/X86/rot16.ll		diff \| blob \| history
llvm/test/CodeGen/X86/rot32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/rotate.ll		diff \| blob \| history
llvm/test/CodeGen/X86/rotate4.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sadd_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sadd_sat_plus.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sadd_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sdiv_fix.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sdiv_fix_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/select.ll		diff \| blob \| history
llvm/test/CodeGen/X86/setcc-combine.ll		diff \| blob \| history
llvm/test/CodeGen/X86/setcc.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sext-trunc.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-amount-mod.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-and.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-bmi2.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-by-signext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-coalesce.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-combine.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-double.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-i128.ll		diff \| blob \| history
llvm/test/CodeGen/X86/shift-mask.ll		diff \| blob \| history
llvm/test/CodeGen/X86/smul_fix.ll		diff \| blob \| history
llvm/test/CodeGen/X86/smul_fix_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/srem-seteq-illegal-types.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sshl_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sshl_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/ssub_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/ssub_sat_plus.ll		diff \| blob \| history
llvm/test/CodeGen/X86/ssub_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/store-narrow.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sttni.ll		diff \| blob \| history
llvm/test/CodeGen/X86/sub-of-not.ll		diff \| blob \| history
llvm/test/CodeGen/X86/swifterror.ll		diff \| blob \| history
llvm/test/CodeGen/X86/tail-opts.ll		diff \| blob \| history
llvm/test/CodeGen/X86/tls.ll		diff \| blob \| history
llvm/test/CodeGen/X86/trunc-to-bool.ll		diff \| blob \| history
llvm/test/CodeGen/X86/uadd_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/uadd_sat_plus.ll		diff \| blob \| history
llvm/test/CodeGen/X86/uadd_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/udiv_fix.ll		diff \| blob \| history
llvm/test/CodeGen/X86/udiv_fix_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/umul_fix.ll		diff \| blob \| history
llvm/test/CodeGen/X86/umul_fix_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll		diff \| blob \| history
llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll		diff \| blob \| history
llvm/test/CodeGen/X86/urem-power-of-two.ll		diff \| blob \| history
llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll		diff \| blob \| history
llvm/test/CodeGen/X86/ushl_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/ushl_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/usub_sat.ll		diff \| blob \| history
llvm/test/CodeGen/X86/usub_sat_plus.ll		diff \| blob \| history
llvm/test/CodeGen/X86/usub_sat_vec.ll		diff \| blob \| history
llvm/test/CodeGen/X86/vec_setcc.ll		diff \| blob \| history
llvm/test/CodeGen/X86/vector-sext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xchg-nofold.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xmulo.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xor-icmp.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xor-lea.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xor-with-overflow.ll		diff \| blob \| history
llvm/test/CodeGen/X86/xor.ll		diff \| blob \| history
llvm/test/CodeGen/X86/zext-logicop-shift-load.ll		diff \| blob \| history

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