armv8: New MMU setup code allowing to use 48+ bits PA/VA
authorSergey Temerkhanov <s.temerkhanov@gmail.com>
Wed, 14 Oct 2015 16:55:45 +0000 (09:55 -0700)
committerTom Rini <trini@konsulko.com>
Tue, 19 Jan 2016 22:25:36 +0000 (22:25 +0000)
commit94f7ff36e521674a02145a3ff04b659c40122ba3
tree34b1fa03bdd7b9581994ec71f6c85ce5da114622
parentba5648cd91b010a9288798472a6d51b137fff89d
armv8: New MMU setup code allowing to use 48+ bits PA/VA

This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule are able to use direct PA-VA mapping of the whole 48 bit
address space.
It also adds the ability to reset the SCTRL register at the very beginning
of execution to avoid interference from stale mappings set up by early
firmware/loaders/etc.

Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
arch/arm/cpu/armv8/cache_v8.c
arch/arm/cpu/armv8/start.S
arch/arm/include/asm/armv8/mmu.h
arch/arm/include/asm/global_data.h
arch/arm/include/asm/system.h
doc/README.arm64