[X86] Promote i16 SRA instructions to i32
authorCraig Topper <craig.topper@intel.com>
Fri, 5 Apr 2019 06:32:50 +0000 (06:32 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 5 Apr 2019 06:32:50 +0000 (06:32 +0000)
commit94f1772b1e517ba0ea47150eca27f3fe9366f2ec
treef61bce6e9883b241ba60edab7266c7e09fe549d8
parentc39636cc2c6d17453bca3d76cdaba4a458b45ae3
[X86] Promote i16 SRA instructions to i32

We already promote SRL and SHL to i32.

This will introduce sign extends sometimes which might be harder to deal with than the zero we use for promoting SRL. I ran this through some of our internal benchmark lists and didn't see any major regressions.

I think there might be some DAG combine improvement opportunities in the test changes here.

Differential Revision: https://reviews.llvm.org/D60278

llvm-svn: 357743
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/dagcombine-shifts.ll
llvm/test/CodeGen/X86/iabs.ll
llvm/test/CodeGen/X86/load-scalar-as-vector.ll
llvm/test/CodeGen/X86/pr32420.ll
llvm/test/CodeGen/X86/speculative-load-hardening.ll