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[AArch64] implement GPR (U/S)(MIN/MAX) instruction SDag support
authorTies Stuij <ties.stuij@arm.com>
Tue, 6 Dec 2022 10:56:43 +0000 (10:56 +0000)
committerTies Stuij <ties@stuij.se>
Tue, 6 Dec 2022 10:57:49 +0000 (10:57 +0000)
commit94e7e58fa4d32b0e0bfad395b2cc219c9dccd5b2
treec47be69dc2abbc8a8591f43e3a3664a937dc295ftree | snapshot
parent0b20c3034c9cef2c0fdbfdfba1d4dfa0761a014fcommit | diff
[AArch64] implement GPR (U/S)(MIN/MAX) instruction SDag support

Using SelectionDag, lower umin, umax, smin, smax intrinsics to corresponding
UMIN, UMAX, SMIN, SMAX instructions when feat CSSC is available.

See specs for corresponding immediate and register versions in:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D138813
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/lib/Target/AArch64/AArch64InstrInfo.td diff | blob | history
llvm/test/CodeGen/AArch64/min-max.ll diff | blob | history
Domain: System / Toolchain;