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(parent: d74361d) | patch
mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits
authorJiri Pirko <jiri@mellanox.com>
Thu, 31 Oct 2019 09:42:06 +0000 (11:42 +0200)
committerDavid S. Miller <davem@davemloft.net>
Thu, 31 Oct 2019 17:54:46 +0000 (10:54 -0700)
commit94e768373ae10d72528307256a869c846dc4ba00
treee1396ffd124736e5be9d19fef1ed80435445c27etree | snapshot
parentd74361dc58709fa200c2db86fa5cf086dc4acec8commit | diff
mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits

The tx/rx lane fields got extended to 4 bits, update the reg field
description accordingly.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
Domain: System / Kernel;