ARM: IGEP0033: Update timing to run DDR at 400MHz.
authorEnric Balletbo i Serra <eballetbo@iseebcn.com>
Tue, 10 Sep 2013 09:12:26 +0000 (11:12 +0200)
committerTom Rini <trini@ti.com>
Mon, 7 Oct 2013 11:43:46 +0000 (07:43 -0400)
commit94b32f60fe8f21b60e8e1f31dcb27bcec7aa1fff
treed7397cda87620933cacdfa5c64ead897d634cabd
parente3cf9692053a4989f76a8964ab7d29df4fee90c0
ARM: IGEP0033: Update timing to run DDR at 400MHz.

We can run the DDR at 400MHz, so update the timings for that purpose.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
arch/arm/include/asm/arch-am33xx/ddr_defs.h
board/isee/igep0033/board.c