[RISCV] Ensure the forwarded AVL register is alive
authorPhilip Reames <preames@rivosinc.com>
Tue, 24 May 2022 21:58:09 +0000 (14:58 -0700)
committerPhilip Reames <listmail@philipreames.com>
Tue, 24 May 2022 22:07:42 +0000 (15:07 -0700)
commit948d931323a13dfc68430814a44b9075a59e2310
tree34e448e23ce095c9267cb17f30336007de57cb9a
parent5799f843a22029bd51d45edcd773e3c8662a0a08
[RISCV] Ensure the forwarded AVL register is alive

When the AVL value does not fit in 5 bits, the register in which this value is stored may be dead when we want to forward it. This patch ensure the kill flags on the register are cleared before forwarding.

Patch by: loralb
Differential Revision: https://reviews.llvm.org/D125971
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll