intel drivers: repair missing flush operations
authorJesse Brandeburg <jesse.brandeburg@intel.com>
Wed, 20 Jul 2011 00:56:21 +0000 (00:56 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Thu, 4 Aug 2011 11:59:07 +0000 (04:59 -0700)
commit945a51517cc0bd9e461f2018624dfc1faef9ddee
tree5782ffe27f3fb8f5b4cbc19ffe7b74bff36c6a05
parentd3e614577198757d5854caa912e88f2d4296479b
intel drivers: repair missing flush operations

after review of all intel drivers, found several instances where
drivers had the incorrect pattern of:
memory mapped write();
delay();

which should always be:
memory mapped write();
write flush(); /* aka memory mapped read */
delay();

explanation:
The reason for including the flush is that writes can be held
(posted) in PCI/PCIe bridges, but the read always has to complete
synchronously and therefore has to flush all pending writes to a
device.  If a write is held and followed by a delay, the delay
means nothing because the write may not have reached hardware
(maybe even not until the next read)

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
18 files changed:
drivers/net/e1000/e1000_ethtool.c
drivers/net/e1000/e1000_hw.c
drivers/net/e1000e/es2lan.c
drivers/net/e1000e/ethtool.c
drivers/net/e1000e/ich8lan.c
drivers/net/e1000e/lib.c
drivers/net/e1000e/phy.c
drivers/net/igb/e1000_nvm.c
drivers/net/igb/igb_ethtool.c
drivers/net/igb/igb_main.c
drivers/net/igbvf/netdev.c
drivers/net/ixgb/ixgb_ee.c
drivers/net/ixgb/ixgb_hw.c
drivers/net/ixgbe/ixgbe_common.c
drivers/net/ixgbe/ixgbe_ethtool.c
drivers/net/ixgbe/ixgbe_main.c
drivers/net/ixgbe/ixgbe_phy.c
drivers/net/ixgbe/ixgbe_x540.c