HDLCD: Limit the pixel clock to 165MHz to match TDA19988 specs.
authorLiviu Dudau <Liviu.Dudau@arm.com>
Wed, 8 Oct 2014 11:40:09 +0000 (12:40 +0100)
committerLiviu Dudau <Liviu.Dudau@arm.com>
Wed, 8 Oct 2014 11:40:09 +0000 (12:40 +0100)
commit941859381554557914e47e6e5d62ca0093eab91a
tree71055a3de5128dc83898c74282017284cf7c3468
parent04eb81b95d0d700064772b8a43e537ae344ffa4a
HDLCD: Limit the pixel clock to 165MHz to match TDA19988 specs.

The DT set the upper limit for the pixel clock to 210MHz. While
technically the TDA19988 chip works at that frequency, it is
outside the spec sheet values. Restrict the clock range to the
published values.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
arch/arm64/boot/dts/juno.dts