powerpc: Support prefixed instructions in alignment handler
authorJordan Niethe <jniethe5@gmail.com>
Wed, 6 May 2020 03:40:48 +0000 (13:40 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 18 May 2020 14:11:03 +0000 (00:11 +1000)
commit9409d2f9dad2f0679d67dc24d8116dd3e837b035
tree8dda61e04dbedf6d9f522994050cda1ef8a7935e
parentb4657f7650babc9bfb41ce875abe41b18604a105
powerpc: Support prefixed instructions in alignment handler

If a prefixed instruction results in an alignment exception, the
SRR1_PREFIXED bit is set. The handler attempts to emulate the
responsible instruction and then increment the NIP past it. Use
SRR1_PREFIXED to determine by how much the NIP should be incremented.

Prefixed instructions are not permitted to cross 64-byte boundaries. If
they do the alignment interrupt is invoked with SRR1 BOUNDARY bit set.
If this occurs send a SIGBUS to the offending process if in user mode.
If in kernel mode call bad_page_fault().

Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
Link: https://lore.kernel.org/r/20200506034050.24806-29-jniethe5@gmail.com
arch/powerpc/kernel/traps.c