drm/i915: Use efficient frequency for HSW/BDW
authorTom O'Rourke <Tom.O'Rourke@intel.com>
Wed, 19 Nov 2014 22:21:52 +0000 (14:21 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 20 Nov 2014 12:03:31 +0000 (13:03 +0100)
commit93ee29203f506582cca2bcec5f05041526d9ab0a
tree5e2dfc3d76b0ea69a8c6e363b6c300b652b946bb
parentf548c0e9d4200a660e607bb4d8824c21c6d0bd74
drm/i915: Use efficient frequency for HSW/BDW

Added gen6_init_rps_frequencies() to initialize
the rps frequency values.  This function replaces
parse_rp_state_cap().  In addition to reading RPn,
RP0, and RP1 from RP_STATE_CAP register, the new
function reads efficient frequency (aka RPe) from
pcode for Haswell and Broadwell and sets the turbo
softlimits.  The turbo minimum frequency softlimit
is set to RPe for Haswell and Broadwell and to RPn
otherwise.

For RPe, the efficiency is based on the frequency/power
ratio (MHz/W); this is considering GT power and not
package power.  The efficent frequency is the highest
frequency for which the frequency/power ratio is within
some threshold of the highest frequency/power ratio.
A fixed decrease in frequency results in smaller
decrease in power at frequencies less than RPe than
at frequencies above RPe.

v2: Following suggestions from Chris Wilson and
Daniel Vetter to extend and rename parse_rp_state_cap
and to open-code a poorly named function.

Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Remove unused variables.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c