arm64: tegra: Fix base address for SOR1 on Tegra194
authorThierry Reding <treding@nvidia.com>
Fri, 26 Jul 2019 10:16:18 +0000 (12:16 +0200)
committerThierry Reding <treding@nvidia.com>
Tue, 29 Oct 2019 19:30:05 +0000 (20:30 +0100)
commit939e7430dee4e1c0595124b8ccd1c8b5db162dd8
tree08bbb96bbd9772d9a4255acc33f6e6fb8f3eedbd
parent1aaa7698670cb980280e034d76f1bc1ca193af43
arm64: tegra: Fix base address for SOR1 on Tegra194

The SOR1 hardware block's registers start at physical address 0x15b40000
as correctly specified by the unit-address, but the reg property lists a
wrong value, likely because it was copy-and-pasted from SOR0 but not
correctly updated.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra194.dtsi