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MIPS: CMP: Extend the GIC IPI interrupts beyond 32
authorTim Anderson <tanderson@mvista.com>
Wed, 17 Jun 2009 23:21:19 +0000 (16:21 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 3 Jul 2009 14:45:25 +0000 (15:45 +0100)
commit9306c8def6abc2dbde4ac75eb6c631606b8fc1dd
tree4896cca4c6b27fa42e6f51d93c0a4f86b6f6fa3etree | snapshot
parentb53d4d1f8d522342e66f79b8b49a19835071fed4commit | diff
MIPS: CMP: Extend the GIC IPI interrupts beyond 32

This patch extends the GIC interrupt handling beyond the current 32 bit
range as well as extending the number of interrupts based on the number
of CPUs.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/gic.h diff | blob | history
arch/mips/kernel/irq-gic.c diff | blob | history
Domain: System / Kernel;