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(parent: b4aa487) | patch
pinctrl: aspeed: g6: Fix PWMG0 pinctrl setting
authorBilly Tsai <billy_tsai@aspeedtech.com>
Thu, 17 Dec 2020 02:49:12 +0000 (10:49 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 4 Jan 2021 15:02:28 +0000 (16:02 +0100)
commit92ff62a7bcc17d47c0ce8dddfb7a6e1a2e55ebf4
tree48e6af7f29e2de311c2e500d82dc74b2a4afd1a1tree | snapshot
parentb4aa4876e58d12fb3ace425969dcbf4df37aa254commit | diff
pinctrl: aspeed: g6: Fix PWMG0 pinctrl setting

The SCU offset for signal PWM8 in group PWM8G0 is wrong, fix it from
SCU414 to SCU4B4.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Fixes: 2eda1cdec49f ("pinctrl: aspeed: Add AST2600 pinmux support")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20201217024912.3198-1-billy_tsai@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c diff | blob | history
Domain: System / Kernel;