RDMA/iw_cxgb4: set the correct FID value in DSGL commands
authorHariprasad S <hariprasad@chelsio.com>
Fri, 6 May 2016 16:47:56 +0000 (22:17 +0530)
committerDoug Ledford <dledford@redhat.com>
Fri, 13 May 2016 23:38:05 +0000 (19:38 -0400)
commit92f850ec3a18d9d8bf2157a8509d435d49ce80b6
tree9f742f9b0c3f12395b45fd1a1925b59f9211a5ef
parentccd2c30b4513905a0624a696ec3eeaa3bf93530d
RDMA/iw_cxgb4: set the correct FID value in DSGL commands

The FID value in a ULP_MEMIO command needs to be set to an IQ ID of
a queue configured for our PF.  The FID/IQ id is used to index into the
PCIE FID table, to find out on which function the DMA needs to be
issued. Essentially, every DMA needs to have the ingress queue. The exact
ingress queue doesn't matter, but it needs to be an ingress queue
associated with the function you want to see the DMA on.

Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/infiniband/hw/cxgb4/mem.c
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h