Add support for vector ops in the LLVM dialect
authorNicolas Vasilache <ntv@google.com>
Fri, 9 Aug 2019 12:24:47 +0000 (05:24 -0700)
committerA. Unique TensorFlower <gardener@tensorflow.org>
Fri, 9 Aug 2019 12:25:31 +0000 (05:25 -0700)
commit92dc127ab347cbc4cb4b93db04109eea2a3c13e3
treeb67aecbc35bcee07a78135e8dfd4bac8ee5c082a
parent6d8611b38f59e16c1c3bce5bfbb62714cb6c6674
Add support for vector ops in the LLVM dialect

This CL is step 1/n towards building a simple, programmable and portable vector abstraction in MLIR that can go all the way down to generating assembly vector code via LLVM's opt and llc tools.

This CL adds the 3 instructions `llvm.extractelement`, `llvm.insertelement` and `llvm.shufflevector` as documented in the LLVM LangRef "Vector Instructions" section.

The "Experimental Vector Reduction Intrinsics" are left out for now and can be added in the future on a per-need basis.

Appropriate roundtrip and LLVM Target tests are added.

PiperOrigin-RevId: 262542095
mlir/include/mlir/LLVMIR/LLVMDialect.h
mlir/include/mlir/LLVMIR/LLVMOps.td
mlir/lib/LLVMIR/IR/LLVMDialect.cpp
mlir/test/LLVMIR/invalid.mlir
mlir/test/LLVMIR/roundtrip.mlir
mlir/test/Target/llvmir.mlir