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(parent: 0ce4b37) | patch
[ScalarizeMaskedMemIntrin] Add test cases for masked store expansion. Increase alignm...
authorCraig Topper <craig.topper@intel.com>
Fri, 28 Sep 2018 01:06:09 +0000 (01:06 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 28 Sep 2018 01:06:09 +0000 (01:06 +0000)
commit92b992164d66371fb9796bfee82c7dddb6f381f8
tree82270028e4de9cee4a1c79ec1c1fdd9cc96a7934tree | snapshot
parent0ce4b37bd007ebfc05407991d2584fed91b5fbf8commit | diff
[ScalarizeMaskedMemIntrin] Add test cases for masked store expansion. Increase alignment of one of the masked load test cases.

The masked store alignment is being miscalculated, but masked load is correct.

llvm-svn: 343283
llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-load.ll diff | blob | history
llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-store.ll [new file with mode: 0644] blob
Domain: System / Toolchain;