atl1c: refine phy-register read/write function
authorHuang, Xiong <xiong@qca.qualcomm.com>
Wed, 25 Apr 2012 20:27:10 +0000 (20:27 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 26 Apr 2012 09:03:32 +0000 (05:03 -0400)
commit929a5e9318f090e190b67343fb37533e58aec3a3
tree2f6deb2debeddcf83ecf1889e8eaed60b30fabcb
parent8f33ab913456654b2bfc75b90893dce9561cab9a
atl1c: refine phy-register read/write function

phy register is read/write via MDIO control module ---
that module will be affected by the hibernate status,
to access phy regs in hib stutus, slow frequency clk must
be selected.
To access phy extension register, the MDIO related
registers are refined/updated, a _core function is
re-wroted for both regular PHY regs and extension regs.
existing PHY r/w function is revised based on the _core.
PHY extension registers will be used for the comming
patches.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
drivers/net/ethernet/atheros/atl1c/atl1c_main.c