drm/i915/tgl: Move transcoders to pipes' powerwells
authorJosé Roberto de Souza <jose.souza@intel.com>
Sat, 17 Aug 2019 09:38:25 +0000 (02:38 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 20 Aug 2019 19:49:17 +0000 (12:49 -0700)
commit9288d74f3f58bdf778606a3eee67df89305752f4
treecc99473f211fbb06c4876e2c31ee60fecd64b706
parent465242ee36ebd5a4f31df64692c634f402c8f2d9
drm/i915/tgl: Move transcoders to pipes' powerwells

When trying to read registers from transcoder C and D while PG3 is ON it
causes unclaimed access warnings. Adding the powerwells for the pipes
fixes the issue, but doesn't match the spec.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-4-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c