powerpc/64s: Fix compiler store ordering to SLB shadow area
authorNicholas Piggin <npiggin@gmail.com>
Wed, 30 May 2018 10:31:22 +0000 (20:31 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 3 Jun 2018 10:40:37 +0000 (20:40 +1000)
commit926bc2f100c24d4842b3064b5af44ae964c1d81c
tree9b674eb4430661a7065ce3866651d6cfae69f1c4
parent0cef77c7798a7832769fbd25a4d0b0b3361cc6f0
powerpc/64s: Fix compiler store ordering to SLB shadow area

The stores to update the SLB shadow area must be made as they appear
in the C code, so that the hypervisor does not see an entry with
mismatched vsid and esid. Use WRITE_ONCE for this.

GCC has been observed to elide the first store to esid in the update,
which means that if the hypervisor interrupts the guest after storing
to vsid, it could see an entry with old esid and new vsid, which may
possibly result in memory corruption.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/mm/slb.c