cxl: Fix PSL timebase synchronization detection
authorFrederic Barrat <fbarrat@linux.vnet.ibm.com>
Wed, 24 Feb 2016 17:27:51 +0000 (18:27 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 29 Feb 2016 10:36:00 +0000 (21:36 +1100)
commit923adb1646d5ba739d2a1e63ee20d60574d9da8e
tree21011aeacc61696e7b7897c57e888a1057278dce
parent9ab3ac233a8b4ffcc27c8475b83dee49fc46bc76
cxl: Fix PSL timebase synchronization detection

The PSL timebase synchronization is seemingly failing for
configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
shows the following trace in dmesg:
PSL: Timebase sync: giving up!

The PSL timebase register is actually syncing correctly, but the cxl
driver is not detecting it. Fix is to use the proper timebase-to-time
conversion.

Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: <stable@vger.kernel.org> # 4.3+
Acked-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/pci.c