cxl/port: Limit the port driver to just the HDM Decoder Capability
authorDan Williams <dan.j.williams@intel.com>
Tue, 29 Nov 2022 17:48:36 +0000 (10:48 -0700)
committerDan Williams <dan.j.williams@intel.com>
Sat, 3 Dec 2022 21:40:16 +0000 (13:40 -0800)
commit920d8d2c60787bf63e023b120e81ca788d4191ff
tree4b993325a4009ff78181251861fd561c34a37bbb
parent6c7f4f1e51c2a2474e6d4024d2ed32f8965be4a4
cxl/port: Limit the port driver to just the HDM Decoder Capability

Update the port driver to use cxl_map_component_registers() so that the
component register block can be shared between the cxl_pci driver and
the cxl_port driver. I.e. stop the port driver from reserving the entire
component register block for itself via request_region() when it only
needs the HDM Decoder Capability subset.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/166974411625.1608150.7149373371599960307.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/hdm.c