[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 3 Mar 2016 09:43:28 +0000 (09:43 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 3 Mar 2016 09:43:28 +0000 (09:43 +0000)
commit91dd0a796cb31bb4aa5720fc00f52e340c7f5809
treec43ec3adbb898c71cddec371f869b674bd4ad498
parentffbb67a8e27a65ec9c9a58f88ee269421f2600e4
[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG

Generalise the existing SIGN_EXTEND to SIGN_EXTEND_VECTOR_INREG combine to support zero extension as well and get rid of a lot of unnecessary ANY_EXTEND + mask patterns.

Differential Revision: http://reviews.llvm.org/D17691

llvm-svn: 262599
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vec_int_to_fp.ll
llvm/test/CodeGen/X86/vector-zext.ll