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(parent: 3b20f99) | patch
i965/fs: Fix and enable the instruction scheduler for 16-wide.
authorEric Anholt <eric@anholt.net>
Wed, 23 Mar 2011 20:53:26 +0000 (13:53 -0700)
committerEric Anholt <eric@anholt.net>
Tue, 26 Apr 2011 19:20:12 +0000 (12:20 -0700)
commit91d1a141589441b203a2270417ae665f0616ea3c
treedb395d8f5d8e51a8e2c8dcf8f48a17db461993fctree | snapshot
parent3b20f999bb7e9056e83ca09a842a9747d4ac1674commit | diff
i965/fs: Fix and enable the instruction scheduler for 16-wide.

Most of the work of the scheduler is agnostic to wide dispatch.  It
operates on our virtual GRF file, which means instructions are
generally referring to 8 or 16 wide naturally.  For the MRF file
management we're trying to track the actual hardware MRF file, so we
need to watch if an instruction writes multiple MRFs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp diff | blob | history
Domain: Graphics System / GL;