[RyuJit/ARM32] Fix assertion of failure on "Instruction cannot be encoded" (dotnet...
authorSujin Kim <sjsujin.kim@samsung.com>
Mon, 17 Apr 2017 17:18:39 +0000 (02:18 +0900)
committerBruce Forstall <brucefo@microsoft.com>
Mon, 17 Apr 2017 17:18:39 +0000 (10:18 -0700)
commit91ce66de3e7644fc9199dc240caf73b7b76266b8
treeadf964def59e8572f516a72368e707338b2b38ea
parenta739c1bd250147213ff783bf2c9b4108672c395b
[RyuJit/ARM32] Fix assertion of failure on "Instruction cannot be encoded" (dotnet/coreclr#10789)

Fix assertion of failure on "Instruction cannot be encoded"

I figured out the bit set mask for '0xffffff00' which is the imm is not supportted on ARM.
So at first, It would be checked the validation of using instruction with immediate constants.
If not, it would be use the instruction with registers.

Commit migrated from https://github.com/dotnet/coreclr/commit/7231298e767bdfa756b7895118a85cfdcbe75019
src/coreclr/src/jit/codegenarmarch.cpp
src/coreclr/src/jit/lsraarm.cpp