arm64: errata: Add Cortex-A55 to the repeat tlbi list
authorJames Morse <james.morse@arm.com>
Fri, 30 Sep 2022 13:19:59 +0000 (14:19 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 26 Oct 2022 10:34:24 +0000 (12:34 +0200)
commit91c4eb16e804c3cfb6efcaca602556e62cb025a1
treebb74fd8988af104c50db20d9ccd114c95188b5ff
parentfc0f921b7e6efff34f31df8ccd4de5ee27078841
arm64: errata: Add Cortex-A55 to the repeat tlbi list

commit 171df58028bf4649460fb146a56a58dcb0c8f75a upstream.

Cortex-A55 is affected by an erratum where in rare circumstances the
CPUs may not handle a race between a break-before-make sequence on one
CPU, and another CPU accessing the same page. This could allow a store
to a page that has been unmapped.

Work around this by adding the affected CPUs to the list that needs
TLB sequences to be done twice.

Signed-off-by: James Morse <james.morse@arm.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220930131959.3082594-1-james.morse@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/kernel/cpu_errata.c