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(parent: 8f97e22) | patch
drm/amd/pm: correct SMC sclk/mclk boot level setup
authorEvan Quan <evan.quan@amd.com>
Fri, 25 Sep 2020 06:36:09 +0000 (14:36 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Oct 2020 16:00:15 +0000 (12:00 -0400)
commit9182fefcb8ca599e1ecc6b308ebf9695ba439901
treeaf3528752d4aaf9728a5de5c69c6e171e9fe986atree | snapshot
parent8f97e221d64d76b8c80b5fa6b41a9a77b8ab1c9fcommit | diff
drm/amd/pm: correct SMC sclk/mclk boot level setup

Correct Polaris smc boot level setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c diff | blob | history
Domain: System / Kernel;