drm/i915: disable wc gtt pte mappings on gen2
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 10 Oct 2012 21:14:01 +0000 (23:14 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 12 Oct 2012 08:59:10 +0000 (10:59 +0200)
commit9169d3a88072b20f42e68a946e916bd7dfbc7f2c
treef981fbb98946aef615546c68fced4870c07c9ff7
parent1cf8378906b2d5a6449147914fe04c56d6f4fd87
drm/i915: disable wc gtt pte mappings on gen2

It doesn't work since the gtt pte range sits in the middle of the mmio
bar. We didn't notice that since both my and Chris' gen2 machines
don't support PAT and hence all wc io mapping request will
automatically be demoted to uc.

This regression has been introduce in

commit edef7e685da05c13cce50c0126189c80fe2c8f71
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Sep 14 11:57:47 2012 +0100

    agp/intel: Use a write-combining map for updating PTEs

Reported-by: Egbert Eich <eich@pdx.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55834
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/char/agp/intel-gtt.c