MIPS HIGHMEM fixes for cache aliasing and non-DMA I/O.
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Tue, 18 Nov 2014 01:05:09 +0000 (17:05 -0800)
committerLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Tue, 18 Nov 2014 01:05:09 +0000 (17:05 -0800)
commit915e2ab04e6f53a62bb4d18e00e2c30c6b4892a4
treeed068c070dff16053c54788fcf7cb8f7511ff6fe
parent6da04c395f651b844c9559261cc057f24d377cac
MIPS HIGHMEM fixes for cache aliasing and non-DMA I/O.

This patch fixes MIPS HIGHMEM for cache aliasing and non-DMA device
I/O. It does the following:

1.  Uses only colored page addresses while allocating by kmap*(),
    page address in HIGHMEM zone matches a kernel address by color.
    It allows easy re-allocation before flushing cache.
    It does it for kmap() and kmap_atomic().

2.  Fixes instruction cache flush by right color address via
    kmap_coherent() in case of I-cache aliasing.

3.  Flushes D-cache before page is provided for process as I-page.
    It is required for swapped-in pages in case of non-DMA I/O.

4.  Some optimization is done... more comes.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
12 files changed:
arch/mips/Kconfig
arch/mips/include/asm/cacheflush.h
arch/mips/include/asm/cpu-features.h
arch/mips/include/asm/fixmap.h
arch/mips/include/asm/highmem.h
arch/mips/include/asm/mipsregs.h
arch/mips/include/asm/page.h
arch/mips/mm/c-r4k.c
arch/mips/mm/cache.c
arch/mips/mm/highmem.c
arch/mips/mm/init.c
arch/mips/mm/sc-mips.c