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[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.
authorChad Rosier <mcrosier@codeaurora.org>
Fri, 18 Apr 2014 21:22:04 +0000 (21:22 +0000)
committerChad Rosier <mcrosier@codeaurora.org>
Fri, 18 Apr 2014 21:22:04 +0000 (21:22 +0000)
commit9149acb05383a87d55ed13c987e7ffec047689db
treec35fe58df847d92b137f8908a7394a32be2527e8tree | snapshot
parente5097d0ed435c8cae0143e4fb6c560f812fe541dcommit | diff
[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.

Summary:
This port includes the rudimentary latencies that were provided for
the Cortex-A53 Machine Model in the AArch64 backend. It also changes
the SchedAlias for COPY in the Cyclone model to an explicit
WriteRes mapping to avoid conflicts in other subtargets.

Differential Revision: http://reviews.llvm.org/D3427
Patch by Dave Estes <cestes@codeaurora.org>!

llvm-svn: 206652
llvm/lib/Target/ARM64/ARM64.td diff | blob | history
llvm/lib/Target/ARM64/ARM64SchedA53.td [new file with mode: 0644] blob
llvm/lib/Target/ARM64/ARM64SchedCyclone.td diff | blob | history
llvm/test/CodeGen/ARM64/misched-basic-A53.ll [new file with mode: 0644] blob
Domain: System / Toolchain;