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(parent: 92c40a5) | patch
[mips][msa] Made the operand register sets optional for the I8 format
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:25:47 +0000 (12:25 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:25:47 +0000 (12:25 +0000)
commit9148218cbeb70c6dc1308692b6acd2ec66b81097
treec6c36016a5e9dfd07ffcde696f0ddaf5cf95ef97tree | snapshot
parent92c40a5796c6f6dcc29e5ef4aa8e5bbdbf864656commit | diff
[mips][msa] Made the operand register sets optional for the I8 format

Their default is to be the same as the result register set.

No functional change

llvm-svn: 190142
llvm/lib/Target/Mips/MipsMSAInstrInfo.td diff | blob | history
Domain: System / Toolchain;