author | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Fri, 28 Aug 2020 18:58:33 +0000 (14:58 -0400) | ||
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Fri, 28 Aug 2020 21:50:37 +0000 (17:50 -0400) | ||
commit | 9145d75226a071c530d14e051008e4c32e87cf5e | |
tree | 870aa0a5800e084e115f4dff5ceb90ae6b4f130f | tree | snapshot |
parent | 7128e647063dd858901aa7a5d90be8744c673866 | commit | diff |
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | diff | blob | history | |
llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/spill192.mir | diff | blob | history |