drm/i915/gen9+: Remove redundant state check during power well toggling
authorImre Deak <imre.deak@intel.com>
Thu, 6 Jul 2017 14:40:31 +0000 (17:40 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 27 Jul 2017 07:38:51 +0000 (09:38 +0200)
commit9137726abc3bc3217dd3adde67c1dce9a1a87c3f
treebc38044c4707f620bb9bd3eab0fd94fdd7081a1e
parent2efbda7295f573a16a163affddfed849e097647b
drm/i915/gen9+: Remove redundant state check during power well toggling

Atm we enable/disable a power well only if it wasn't already
enabled/disabled respectively. The only reason for this I can think of
is to save the extra MMIO writes. Since the HW state matches the power
well's usage counter most of the time the overhead due to these MMIOs is
insignificant. Let's simplify the code by making the writes
unconditional.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1499352040-8819-10-git-send-email-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_runtime_pm.c