clk: meson: meson8b: fix the offset of vid_pll_dco's N value
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 2 Dec 2018 21:42:18 +0000 (22:42 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 13 Dec 2019 07:52:22 +0000 (08:52 +0100)
commit9122845dc398e1ab3316e18dc10b469c689c85ce
tree6f0a9a6ef0e1f91481c9d29509cd66a7841ab76e
parent90ac7278e652660bd7ffd2e23bfa13893237a344
clk: meson: meson8b: fix the offset of vid_pll_dco's N value

[ Upstream commit 376d8c45bd6ac79f02ecf9ca1606dc5d1b271bc0 ]

Unlike the other PLLs on Meson8b the N value "vid_pll_dco" (a better
name would be hdmi_pll_dco or - as the datasheet calls it - HPLL) is
located at HHI_VID_PLL_CNTL[14:10] instead of [13:9].
This results in an incorrect calculation of the rate of this PLL because
the value seen by the kernel is double the actual N (divider) value.
Update the offset of the N value to fix the calculation of the PLL rate.

Fixes: 28b9fcd016126e ("clk: meson8b: Add support for Meson8b clocks")
Reported-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20181202214220.7715-2-martin.blumenstingl@googlemail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/meson/meson8b.c